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Инструкция по эксплуатации Daewoo, модель DTC-21Y1/21Y2

Производитель: Daewoo
Размер: 6.92 mb
Название файла: CP520.pdf
Язык инструкции:en
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Фрагмент инструкции


- Find the “G2 – SCREEN” item in service mode. - Adjust screen volume (on FBT) to bring the cursor to central position(Green). 3.7.2 WHITE BALANCE - Select a dark picture and adjust RED BIAS and GRN BIAS to the desired colour temperature. - Select a bright picture and adjust RED, GRN and BLUE GAIN to the desired colour temperature. 3.7.3 FOCUS Adjust the Focus volume (on FBT) to have the best resolution on screen. 3.7.4 VERTICAL GEOMETRY Adjust V. LINEAR (linearity), S CORRECT (S. Correction), VERT SIZE (Vertical amplitude), VERT CENT (vertical centring) to compensate for vertical distortion. 3.7.5 HORIZONTAL PICTURE CENTRING Adjust HOR CEN (Horizontal centre) to have the picture in the centre of the screen. 3.7.6 EAST / WEST CORRECTION Adjust the PARABOLA, HOR WIDTH, CORNER, HOR PARAL, EW TRAPEZ, to compensate for geometrical distortion. HOR PARAL DTV R&D Europe CP-520/520A/520F Service Manual HOR WIDTH adjust for 93% overscan. PARABOLA CORNER B & CORNER T EW TRAPEZ 3.7.7 AGC - Make sure option bits are correct for the tuner fitted on the chassis (See above how to change option bits). - Adjust the antenna signal level at 62 dBmV - Tune a colour bar pattern. - Find the “AGC” item in service mode. - Press the key “OK” on the remote keypad and wait until AGC level stabilise to the optimum value. - Alternatively, use “Vol Up/Dwn” keys to adjust manually to the desired Tuner Take Over Point (TOP). DTV R&D Europe CP-520/520A/520F Service Manual 4 IC DESCRIPTION 4.1 UOC III Series The UOCIII series combines the functions of a Video Signal Processor (VSP) together with a FLASH embedded TEXT/Control/Graphics m-Controller (TCG m-Controller) and US Closed Caption decoder. In addition the following functions can be added: · Adaptive digital (4H/2H) PAL/NTSC combfilter · Teletext decoder with 10 page text memory · Multi-standard stereo decoder · BTSC stereo decoder · Digital sound processing circuit · Digital video processing circuit 4.1.1 IC MARKING AND VERSION Chassis IC marking OSD languages ATSS countries Text BULGARIAN, CZECH, GERMAN, DANISH, SPANISH, FRENCH, FINNISH, ENGLISH, GREEK, Austria, Belgium, Switzerland, Czech Republic, Germany, Denmark, Spain, CP-520A HUNGARIAN, France, Finland, GB, PAN-EUROPEAN CP-520 ITALIAN, Greece, Hungary, Italy, LATIN, CYRILLIC, CP-520F NORWEGIAN, DUTCH, POLISH, ROMANIAN, RUSSIAN, SWEDISH, SLOVAKIAN. Ireland, Norway, Netherlands, Portugal, Poland, Sweden, Slovak Republic, Others GREEK. DTV R&D Europe CP-520/520A/520F Service Manual 4.1.2. BLOCK DIAGRAM DTV R&D Europe CP-520/520A/520F Service Manual 4.1.3. PINNING QFP 128pin Symbol Short Description 1 P1.5/TX Port 1.5 or UART bus 2 P1.4/RX port 1.4 or UART bus 3 P1.2/INT2 port 1.2 or external interrupt 2 Ground4 VSSC3 VDDC3 digital supply to core (1.8V) port 2.5 or PWM4 output 6 P2.5/PWM4 7 P2.4/PWM3 port 2.4 or PWM3 output 8 VSSC/P digital ground for m-Controller core and periphery 9 P3.3/ADC3 port 3.3 or ADC3 input P3.2/ADC2 port 3.2 or ADC2 input 11 DECV1V8 decoupling 1.8 V supply 12 VDDC1 digital supply to core (+1.8 V) 13 P3.1/ADC1 port 3.1 or ADC1 input 14 P3.0/ADC0 port 3.0 or ADC0 input P2.3/PWM2 port 2.3 or PWM2 output 16 P2.2/PWM1 port 2.2 or PWM1 output 17 P2.1/PWM0 port 2.1 or PWM0 output 18 P2.0/TPWM port 2.0 or Tuning PWM output 19 VDDP(3.3V) supply to periphery and on-chip voltage regulator (3.3 V) P1.7/SDA port 1.7 or I2C-bus data line 21 P1.6/SCL port 1.6 or I2C-bus clock line 22 P1.3/T1 port 1.3 or Counter/Timer 1 input 23 P0.0/I2SDI1/O port 0.0 or I2S digital input 1 or I2S digital output 24 P0.1/I2SDO1 port 0.1 or I2S digital output 1 P0.2/I2SDO2 port 0.2 or I2S digital output 2 26 P0.3/I2SCLK port 0.3 or I2S clock 27 P0.4/I2SWS port 0.4 or I2S word select 28 VSSC2 Ground 29 VDDC2 digital supply to core (1.8 V) P1.1/T0 port 1.1 or Counter/Timer 0 input 31 P1.0/INT1 port 1.0 or external interrupt 1 32 INT0/P0.5 external interrupt 0 or port 0.5 (4 mA current sinking capability for direct drive of LEDs) 33 VDDadc(1.8) supply voltage video ADC 34 VSSadc ground for on-chip temperature sensor VDDA2(3.3) supply voltage SDAC (3.3 V) 36 VDDA(1.8) analogue supply for audio ADCs (1.8 V) 37 GNDA Ground 38 VREFAD reference voltage for audio ADCs (3.3/2 V) 39 VREFAD_POS positive reference voltage (3.3 V) VREFAD_NEG negative reference voltage (0 V) 41 VDDA1 analog supply for TCG m-Controller and digital supply for TV-processor (+3.3 V) 42 BO Blue output DTV R&D Europe CP-520/520A/520F Service Manual 43 GO Green output 44 RO Red output 45 BLKIN black current input 46 BCLIN beam current limiter input 47 VP3 3rd supply for TV processor 48 GND3 ground 3 for TV-processor 49 B/PBIN3 3rd B input / PB input 50 G/YIN3 3rd G input / Y input 51 R/PRIN3 3rd R input / PR input 52 INSSW3 3rd RGB / YPBPR insertion input 53 VOUT(SWO1) V-output for YUV interface (general purpose switch output) 54 UOUT(INSSW2) U-output for YUV interface (2nd RGB / YPBPR insertion input) 55 YOUT Y-output (for YUV interface) 56 YSYNC Y-input for sync separator 57...

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