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The AD9843A’s signal chain consists of an input clamp, correlated double sampler (CDS), digitally controlled variable gain amplifier (VGA), black level clamp, and 10-bit A/D converter. Additional input modes are provided for processing analog video signals. The internal registers are programmed through a 3-wire serial digital interface. Programmable features include gain adjustment, black level adjustment, input configuration, and power- down modes. The AD9843A operates from a single 3 V power supply, typically dissipates 78 mW, and is packaged in a 48-lead LQFP. FUNCTIONAL BLOCK DIAGRAM PBLK AVDD AVSS CLPOB DATACLKSHDSHP BANDGAP REFERENCE 2:1 MUX OFFSET DAC INTERNAL TIMING INTERNAL BIAS 2dB~36dB 10 8 DIGITAL INTERFACE 10 CDS VGA CLP BUF2:1 MUX CLP AD9843A 4dB6dB INTERNAL REGISTERS CLP 10-BIT ADC 6 DRVDD DRVSS CCDIN DOUT VRT CLPDM VRB AUX1IN CML AUX2IN DVDD DVSS SL SCK SDATA REV. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: Fax: 781/326-8703 © Analog Devices, Inc., 2000 AD9843A–SPECIFICATIONS GENERAL SPECIFICATIONS (TMIN to TMAX, AVDD = DVDD = 3.0 V, fDATACLK = 20 MHz, unless otherwise noted.) Parameter Min Typ Max Unit TEMPERATURE RANGE Operating Storage –20 –65 +85 +150 °C °C POWER SUPPLY VOLTAGE Analog, Digital, Digital Driver 2.7 3.6 V POWER CONSUMPTION Normal Operation Power-Down Modes Fast Recovery Mode Standby Total Power-Down (Specified Under Each Mod45 5 1 e of Operation) mW mW mW MAXIMUM CLOCK RATE 20 MHz A/D CONVERTER Resolution Differential Nonlinearity (DNL) No Missing Codes Full-Scale Input Voltage Data Output Coding10 10 ± 0.4 2.0 Straight Binary ± 1.0 Bits LSB Bits Guaranteed V VOLTAGE REFERENCE Reference Top Voltage (VRT) Reference Bottom Voltage (VRB) 2.0 1.0 V V Specifications subject to change without notice. DIGITAL SPECIFICATIONS (DRVDD = 2.7 V, CL = 20 pF unless otherwise noted.) Parameter Symbol Min Typ Max Unit LOGIC INPUTS High Level Input Voltage VIH 2.1 V Low Level Input Voltage VIL 0.6 V High Level Input Current IIH 10 .A Low Level Input Current IIL 10 .A Input Capacitance CIN 10 pF LOGIC OUTPUTS High Level Output Voltage, IOH = 2 mA VOH 2.2 V Low Level Output Voltage, IOL = 2 mA VOL 0.5 V Specifications subject to change without notice. –2– REV. 0 AD9843A CCD-MODE SPECIFICATIONS (TMIN to TMAX, AVDD = DVDD = 3.0 V, fDATACLK = fSHP = fSHD = 20 MHz, unless otherwise noted.) Parameter Min Typ Max Unit Notes POWER CONSUMPTION 78 mW See TPC 1 for Power Curves MAXIMUM CLOCK RATE 20 MHz CDS Allowable CCD Reset Transient1 500 mV See Input Waveform in Note 1 Max CCD Black Pixel Amplitude1 200 mV Max Input Range Before Saturation1 1.0 V p-p With 4 dB CDS Gain Max Input Range Before Saturation 1.5 V p-p With –2 dB CDS Gain Max Input Range Before Saturation 0.5 V p-p With 10 dB CDS Gain Max Output Range 1.6 V p-p At Any CDS Gain Setting Gain Resolution 64 Steps Gain Range (Two’s Complement Coding) See Figure 12 for CDS Gain Curve Min Gain (CDS Gain Register Code 32) –2 dB Medium Gain (CDS Gain Code 63) 4 dB 4 dB Is Default with CDS Gain Disabled Max Gain (CDS Gain Code 31) 10 dB VARIABLE GAIN AMPLIFIER (VGA) Max Input Range Max Output Range Gain Control Resolution Gain MonotonicityGain Range Low Gain (VGA Register Code 91) Max Gain (VGA Code 1023) 1.6 2.0 1024 Guaranteed 2 36 V p-p V p-p Steps dB dB See Figure 13 for VGA Gain Curve See Page 13 for Gain Equations BLACK LEVEL CLAMP Clamp Level Resolution Clamp Level 256 Steps Measured at ADC Output Min Clamp Level 0 LSB Max Clamp Level 63.75 LSB SYSTEM PERFORMANCE Specifications Include Entire Signal Chain Gain Accuracy, VGA Code 91 to 1023 –0.5 +0.5 dB Use Equations on Page 13 to Calculate Gain Peak Nonlinearity, 500 mV Input Signal 0.1 % 12 dB Gain Applied (4 dB CDS Gain) Peak Nonlinearity, 800 mV Input Signal 0.4 % 8 dB Gain Applied (4 dB CDS Gain) Total Output Noise 0.2 LSB rms AC Grounded Input, 6 dB Gain Applied Power Supply Rejection (PSR) 40 dB Measured with Step Change on Supply POWER-UP RECOVERY TIME Clocks Must Be Applied, as in Figures 5 and 6 From Fast Recovery Mode 0.1 ms From Reference Standby Mode 1 ms From Total Shutdown Mode 3 ms From Power-Off Condition 15 ms NOTES 1Input Signal Characteristics defined as follows, with 4 dB CDS gain: 1V MAX 500mV TYP RESET TRANSIENT 200mV MAX INPUT OPTICAL SIGNAL RANGE BLACK PIXEL Specifications subject to change without notice. REV. 0 –3– AD9843A–SPECIFICATIONS AUX1-MODE SPECIFICATIONS (TMIN to TMAX, AVDD = DVDD = 3.0 V, fDATACLK = 20 MHz, unless otherwise noted.) Parameter Min Typ Max Unit POWER CONSUMPTION 60 mW MAXIMUM CLOCK RATE 20 MHz INPUT BUFFER Gain Ma...