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The maximum theoretical bandwidth of the x16 interface is 8 GB/s in each direction, simultaneously, for a bandwidth of 16 GB/s. • PCI Express 1.x with a raw bit rate of 2.5 GT/s results in an effective bandwidth of 2.0 Gb/s each direction per lane. The maximum theoretical bandwidth of the x16 interface is 4 GB/s in each direction, simultaneously, for a bandwidth of 8 GB/s. For information about Refer to PCI Express technology 1.5 System Memory The board has eight DIMM sockets and supports the following memory features: • 1.35 V DDR3 SDRAM DIMMs (JEDEC Specification) • Four independent memory channels with interleaved mode support • Unbuffered, single-sided or double-sided DIMMs with the following restriction: . Double-sided DIMMs with x16 organization are not supported. . Double-sided 2400 MHz DIMMs are not supported. • 64 GB maximum total system memory (using 4 Gb memory technology). Refer to Section 2.1.1 on page 43 for information on the total amount of addressable memory. • Minimum total system memory: 1 GB using 512 MB x16 module • Non-ECC and ECC DIMMs • Serial Presence Detect • DDR3 2400 MHz, 2133 MHz, 1866 MHz, 1600 MHz, 1333 MHz, and 1066 MHz SDRAM DIMMs • XMP performance profile support for memory speeds above 1600 MHz • DIMM slots are numbered in installation order NOTE NOTE To be fully compliant with all applicable DDR SDRAM memory specifications, the board should be populated with DIMMs that support the Serial Presence Detect (SPD) data structure. This allows the BIOS to read the SPD data and program the chipset to accurately configure memory settings for optimum performance. CAUTION 1.5 V is the recommended and default setting for DDR3 memory voltage. The other memory voltage settings in the BIOS Setup program are provided for performance tuning purposes only. Altering the memory voltage may (i) reduce system stability and the useful life of the system, memory, and processor; (ii) cause the processor and other system components to fail; (iii) cause reductions in system performance; (iv) cause additional heat or other damage; and (v) affect system data integrity. Intel has not tested and does not warranty the operation of the processor beyond its specifications. For information on the processor warranty, refer to 020033.htm?wapkw=(processor+warranty). Intel assumes no responsibility that the memory installed on the desktop board, if used with altered clock frequencies and/or voltages, will be fit for any particular purpose. Check with the memory manufacturer for warranty terms and additional details. Table 3 lists the supported DIMM configurations. Table 3. Supported Memory Configurations DIMM Capacity Configuration (Note) SDRAM Density SDRAM Organization Front-side/Back-side Number of SDRAM Devices 512 MB SS 1 Gbit 64 M x16/empty 4 1024 MB SS 1 Gbit 128 M x8/empty 8 1024 MB SS 2 Gbit 128 M x16/empty 4 2048 MB DS 1 Gbit 128 M x8/128 M x8 16 2048 MB SS 2 Gbit 128 M x16/empty 8 4096 MB DS 2 Gbit 256 M x8/256 M x8 16 4096 MB SS 4 Gbit 512 M x8/empty 8 8192 MB DS 4 Gbit 512 M x8/512 M x8 16 Note: “DS” refers to double-sided memory modules (containing two rows of SDRAM) and “SS” refers to single-sided memory modules (containing one row of SDRAM). For information about… Refer to: Tested Memory 025414.htm XMP Tested Memory 1.5.1 Memory Configurations The Intel Core i7 and Intel Xeon processors support the following types of memory organization: • Quad channel (Interleaved) mode. This mode offers the highest throughput for real world applications. • Tri channel (Interleaved) mode. Tri channel mode is enabled when the installed memory capacities of any three DIMM channels are equal. • Dual channel (Interleaved) mode. Dual channel mode is enabled when the installed memory capacities of both DIMM channels are equal. Technology and device width can vary from one channel to the other but the installed memory capacity for each channel must be equal. If different speed DIMMs are used between channels, the slowest memory timing will be used. • Single channel (Asymmetric) mode. This mode is equivalent to single channel bandwidth operation for real world applications. This mode is used when only a single DIMM is installed or the memory capacities are unequal. Technology and device width can vary from one channel to the other. If different speed DIMMs are used between channels, the slowest memory timing will be used. For information about… Refer to: Memory Configuration Examples 011965.htm Figure 3 illustrates the memory channel and DIMM configuration. OM23767.jpg Figure 3. Memory Channel and DIMM Configuration NOTE NOTE For best memory performance always install memory into the blue DIMM memory sockets if installing four DIMMs or less in your configuration. 1.6 Intel® X79 Ex...