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Фрагмент инструкции
This is the same process the PC uses to alert the CPU that a task must be preformed. The CPU upon receiving an interrupt makes a record of what the processor was doing at the time and stores this information on the “stack”; this allows the processor to resume its predefined duties after the interrupt is handled, exactly where it left off. Every main sub-system in the PC has its own interrupt, frequently called an IRQ (short for Interrupt ReQuest). In these early days of PCs, the ability to share IRQs was an important feature for any add-in I/O card. Consider that in the IBM XT the available IRQs were IRQ0 through IRQ7. Of these interrupts only IRQ2-5 and IRQ7 were actually available for use. This made the IRQ a very valuable system resource. To make the maximum use of these system resources, an IRQ-sharing circuit was devised that allowed more than one port to use a selected IRQ. This worked fine as a hardware solution but presented the software designer with a challenge to identify the source of the interrupt. The software designer frequently used a technique referred to as “round-robin polling.” This method required the interrupt service routine to “poll” or interrogate each UART as to its interrupt-pending status. This method of polling was sufficient for use with slower-speed communications, but as modems increased their throughput abilities this method of servicing shared IRQs became inefficient. 24 APPENDIX A: Interrupt Handling A.2 Why Use an Interrupt Status Port (ISP)? The answer to the polling inefficiency was the Interrupt Status Port (ISP). The ISP is a read-only 8-bit register that sets a corresponding bit when an interrupt is pending. Port 1’s interrupt line corresponds with bit D0 of the status port, Port 2’s with D1, etc. The use of this port means that the software designer now only has to poll a single port to determine if an interrupt is pending. The ISP is at “base+7” on each port. For example, if the base = 280 hex, the status port = 287 hex, 28F hex, and so on. The Adapter will allow any one of the available locations to be read to obtain the value in the status register. Both status ports on the Adapter are identical, so either one can be read. Example: This indicates that Channel 2 has an interrupt pending: Bit Position: 7 6 5 4 3 2 1 0 Value Read: 0 0 0 0 0 0 1 0 25 2-PORT RS-232/422/485 PCI HOST ADAPTER Appendix B: Connector Pinouts B.1 RS-232 Table B-1. Pinout of Connector Set to RS-232 Abbreviation Name Pin # Mode TD Transmit Data 3 Output RTS Request To Send 7 Output DTR Data Term Ready 4 Output GND Ground 5 RD Receive Data 2 Input DCD Data Carrier Detect 1 Input DSR Data Set Ready 6 Input CTS Clear To Send 8 Input RI Ring Indicator 9 Input NOTE These pin assignments meet the EIA/TIA/ANSI-574 standard for RS-232 DTE pinning on DB9 connectors. 26 APPENDIX B: Connector Pinouts B.2 RS-422/485 Table A-2. Pinout of Connector Set to RS-422/485 Abbreviation Name Pin # Mode GND Ground 5 TX + Transmit Data Positive 4 Output TX-Transmit Data Negative 3 Output RTS+ Request To Send Positive 6 Output RTS-Request To Send Negative 7 Output RX+ Receive Data Positive 1 Input RX-Receive Data Negative 2 Input CTS+ Clear To Send Positive 9 Input CTS-Clear To Send Negative 8 Input 27 2-PORT RS-232/422/485 PCI HOST ADAPTER Appendix C: Electrical Interfaces C.1 RS-232 Quite possibly the most widely used communication standard is RS-232. This implementation has been defined and revised several times and is often referred to as EIA/TIA-232. The IBM PC/AT computer defined the RS-232 port on a 9-pin D-subminiature connector, and subsequently the EIA/TIA approved this implementation as the EIA/TIA-574 standard. This standard is defined as the 9-Position Non-Synchronous Interface between Data Terminal Equipment and Data Circuit-Terminating Equipment Employing Serial Binary Data Interchange. Both implementations are in widespread use and are referred to as RS-232 in this document. RS-232 is capable of operating at data rates up to 20 kbps at distances less than 50 ft. The absolute maximum data rate may vary due to line conditions and cable lengths. RS-232 is a single-ended or unbalanced interface, meaning that a single electrical signal is compared to a common signal (ground) to determine binary logic states. The RS-232 and the EIA/TIA-574 specification define two types of interface circuits: Data Terminal Equipment (DTE) and Data Circuit-Terminating Equipment (DCE). The Adapter is a DTE device. C.2 RS-422 The RS-422 specification defines the electrical characteristics of balanced-voltage digital interface circuits. RS-422 is a differential interface that defines voltage levels and driver/receiver electrical specifications. On a differential interface, logic levels are defined by the difference in voltage between a pair of outputs or inputs. In contrast, a single-ended interface, for example RS-232, defines the logic levels as the difference in voltage between a single signal and a common ground connection. ...