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They differ oniy in features, pin count and memory size. This enabie AVR to cover the compiete 8- and 16-bit market with one singie, compatibie product famiiy. FEATURES picoPower Technology Reducing power consumption-maintaining performance picoPower — Best MCU power budget Atmel’s picoPower technology reduces power consumption in both sleep and active mode. With picoPower technology the embedded designer can reduce the applications power consumption while maintaining performance. True 1.6 Volt Operation AVR XMEGA offers true 1.6 Volt operation. All functions including ADC, DAC, Flash- and EEPROM memories are all operating down to 1.6V. This allows safe operation directly from a 1.8V ±10% power supply. It also enables deeper battery discharge to Increase battery life. Minimized Leakage Current AVR XMEGA leakage current Is only 100 nA while still maintaining full RAM and register retention. This reduces power consumption for applications spending most time in sleep mode. Ultra Low Power 32 kHz Crystal Oscillator AVR XMEGA’s Real Time Counter consumes only 500 nA while running from a 32.768 kHz Crystal Oscillator. Sleep modes XMEGA has five different sleep modes to turn off unused modules and reduce the power consumption In the application. Many sleep modes makes It easy to find the perfect fit for the application. The granularity is further enhanced by the innovative Power Reduction Register technology. in idle sleep mode all peripherals operate while the CPU is sleeping to reduce the power consumption. with up to 50%, while event handling, communication and data input/output still run. in power-save mode, XMEGA uses 650nA to run the Real Time Counter and have full SRAM and register retention offering industry leading low power numbers. Enabling Watchdog and Brown Out adds only 1uA. in power-down mode, XMEGA uses only 100nA with SRAM and register retetion, and 5us wake-up time from pin change on any i/O pin and TWi address match. Standby and extended standby sleep modes are identical to power-down and power-save, except the external oscillator is kept running to reduce wake-up time. I/O FLASH AC ADC CPU | EVENT MAIN^1 SYS. clk. ^ Idle mode Power-save mode Power-down mode ASYNC CLK. ASYNC. CLK MAIN CLK Btm> Nm BveNT Sysr&t! - Off-loads the CPU - Reducing power usage - Up to 8 simultaneous events -> 100% predictable response time Vie Fast AM CFU! - Up to 3>l MIPS - Single cycle execution $ - Instruction set optimized for C - 32x8 general purpose registers - hardware multiplier Perfect for 8t\G-bit applications VUlCftN O&rrd 6N6№ - Supports both AES and DES - Reducing CPU time and power consumption - Minimal CPU overhead for secure communication lv T-* &* Additional PM A CoNTtoum - Off-loads the CPU - Saves power - 4-channels -> Fast transfer between memories and peripherals TfaætCouNms - 16-bit (32-bit cascaded) - Advanced Waveform extensions - 16-bit RTC XMEGA includes a programmable and SAMPLed BOD and a low power, CPU independent WAfih-dog TMer XMEGA has flexible I/O pin configuration, sensing, and wake-up signaling plus ProgrAMMAbLe MULf-LeveL (MTemiPT Controller Awan№> Clock SysTeM - Internal 32 kHz, 2 MHz, 32 MHz + PLL - \% accuracy - External oscillator or clock input - Dynamic and safe dock switching - \x - 2048x prescaling - Short wake-up from sleep modes Omom> MeMow ^ - FAST and SECURE! - up to 384 kb flash ' - Up to 4 KB EEPROM - Up to 32 KB SRAM Communication Int^facb Hwsreeo analog iNTetwnoN - \2-bit resolution - 2 Msps ADC - \ Msps DAC - ANALOg ioMPAZAfOZ - USART + SPI + Two-Wire Interface (I2C compatible) - External Bus Interface - Debugging/Programming AVR XMEGA™ MiCROCONTOLLERS Everywhere You Are® System Performance For Embedded systems, system performance is much more than a good MiPS number. it is important to have powerful peripherals and features that allow the application to run smoothly with minimum power consumption. AVR CPU and instruction Set Auto increment/Decrement example The AVR XMEGA uses the AVR RISC CPU which is created for high level C code development. The instruction set and CPU design are tuned for minimum code size and maximum execution speed. Due to the true single cycle execution of arithmetic and logic operations, AVR microcontrollers perform close to 1 MIPS per MHz. Central in the AVR architecture is the fast-access register file with 32 x 8-bit general purpose working registers directly connected to the Arithmetic Logic Unit. Within a single clock cycle the ALU can be fed two arbitrary registers, do a requested operation, and write back the result. The AVR XMEGA instruction set also support atomic 16-bit register access, 32-bit arithmetics, and have three 24-bit memory pointers. C Source: unsigned char *var1, *var2; *var1++ = *--var2; Generated assembly code: LD R16, -x ST z+, R16 Event System The innovative AVR XM EGA Event System allow peripherals to send sign...