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Фрагмент инструкции
On delivery the AVR is fleshed with the current firmware and does not need any special programming or settings. Check that jumper J3 on the antenna interface is in the default position en. 2.2Software Installation The ATAK2270 host installation software as well as the related datasheets and documentation are provided by the CD-ROM included in the kit. Furthermore, the up-to-date software and documentation are available via the web. Execute the setup.exe file found on the CD-ROM to launch the installation and generate the ATAK2270.exe program file. If the default settings are accepted during installation, the program file will be installed to path: X:\Programme\ATAK2270\ATAK2270.exe. The AVR base board (Figure 2-3) is equipped with two programming interfaces, ISP and JTAG allowing reprogramming or updating the firmware of AVR flash memory. ISP is a downloading method. Only six I/O lines are needed. The provided header works with the ATSTK500 as well as the AVR ISP In-System Programmer. Both of these are available from Atmel or distributors for very low cost program development. To program the flash memory and the EEPROM, first connect the programming tool to the MB using a six-pin ribbon connector. Make sure that proper orientation is maintained by aligning pin1. The files types accepted use Intel Hex format. To program a hex file into the target AVR device, select “Program AVR” and then “Connect...” from the “Tools” menu in AVR Studio. Once AVR Studio has been opened, connect to the STK500 or AVRISP by selecting “STK500 or AVRISP” in the Platform List. Then select “Connect...”. The driver for the STK500 and AVRISP is then started, and the STK500 dialog should appear. Note that the system supports other programming platforms as well, like the JTAGICE or the JTAGICE mkII. Then select the AVR target device from the pull-down menu on the “Program” tab and locate the Intel- hex file to download. Select the “program” button. Repeat for the EEPROM section. The same steps apply when using the JTAGICE MKII. The JTAG Platform allows more control during software development by allowing real-time debugging of the source code. The JTAGICE MKII supports setting breakpoints and stepping through the code being executed on the target micro. This is very useful for a more complex software project such as this one. Fuse Settings: Fuse bits must be set properly for the kit to function. The only fuse bits that should be set are listed below. All others should be unchecked. 3.1System Overview The ATAK2270 application board unit (Figure 2-3) consists of a ready-to-run standard microcontroller main board equipped with the Atmel AVR® microcontroller ATmega8515L, combined with a piggybacked antenna interface board containing the U2270B reader IC. The following functionality is controlled by the AVR microcontroller: The source program is written in C, and the compiled hex code is loaded in the 8-kByte Flash of the microcontroller. 3.2Power Supply To operate the reader board, an external power supply in the range of DC 10V to 15V/200 mA has to be connected to the jack, alternatively use the mains SMPS. A bridge rectifier placed at the connector input is used for polarity independence. 3.3Antenna Interface The antenna interface (Figure 2-2) is supplied and controlled by the main board via header pin X2/1. The current power supply voltage is indicated by LED1, Power. To adapt a specific antenna coil to the resonant frequency and the Q factor, the components CANT1/CANT2 and R14 (Figure 2-2) can be changed. For the antenna included in the kit, the parameters are matched as follows: Resonant frequency: fres = 125 kHz ±1%, adjusted by CANT1/CANT2 with jumper 3 in position dis Whole antenna quality factor: Q = 20, adjusted by R14 The reader interface has a built-in frequency tuning feature. By the host software, the resonant frequency of the LC antenna circuit can be switched in four steps. Therefore the board is equipped with two stages of high-voltage transistor switches to tune the resonator via switched capacitors. Tuning Mode Jumper J3 Position Disabled 1-2 Enabled 2-3 In default setting Tuning Mode is activated, allowing the adjusting of antenna frequency by host menu. The binary control of the two tuning stages enables the selection of one out of four frequency states. According to the menu definition the frequency steps are designated as follows: High Frequency134.2 kHz (acc. ISO11784/85) Semi High Frequency130 kHz Semi Low Frequency125 kHz Low Frequency121 kHz In disabled mode, the interface operates with the fixed frequency adjusted typically to 125 kHz. The currently selected frequency stage is displayed on the application board by the red LEDs Tune 1and Tune 2 (shown in Figure 2-2, see Table 5-1 for interpretation). The status of the RF field controlled by the microcontroller is indicated by the yellow LED RF on. U1U2270 BSO16 U2LM7808TO220 D1BAS21SOT23 D2BAS21SOT23 D3BAS21SOT23 D4BAS21SOT23 D5BAS21SOT23 D6BAS21SOT23 D7BAS21SOT23...